fundamentals-of-signal-integrity

As the name suggests, signal integrity deals with the integrity of an electrical signal. It all stems from the fact that digital signals are not really binary values of “1” or “0” but are analog voltage (or current) waveforms. As such, these waveforms are subject to the real-world, physical effects of noise, distortion, and loss. If the distances are short and at low bit rates, then a simple conductor will transmit a waveform with acceptable fidelity. However, at high bit rates and over greater distances or through different mediums, then several effects can degrade the electrical signal to the point where errors occur, data is compromised, and devices fail.

In practice, signal integrity consists of a set of measurements that determine the quality of a signal as a way to analyze and mitigate the effects of noise, distortion and loss. It is a set of design practices and test that address how the electrical properties of almost any interconnect cab mess-up the (relatively) pristine signals that come from integrated circuit chip and how these problems can be fixed. There are two common signal integrity electrical design concerns, namely, the timing and the quality of the signal. Does the signal reach its destination when it is supposed to? Is it in good condition when it gets there?

Electronic and electrical packages are full of interconnects that can affect signal integrity within a chip and throughout a printed circuit board (PCB). For example, consider the changes that a signal may experience when traveling through even a short connector. If there are instantaneous impedance changes, then some of the signal will reflect and the rest will probably have some distortion. In simple terms, there may be ringing in the circuit, often due to multiple reflections between impedance discontinuities at various interface ends.

Image Source: Design News / John Blyler
will-quantum-volume-be-the-next-moore’s-law?

This week at CES, IBM announced that its newest quantum computer, Raleigh, doubled its Quantum Volume (QV). This is important because the QV is a measure of the increasing capability of quantum computers solve of complex, real-world problems. But how does an increase in QV relate to existing measures such as semiconductor performance as dictated by Moore’s Law? Before answering that question, it’s necessary to understand what is really meant by a Quantum Volume.

QV is a hardware-agnostic metric that IBM defined to measure the performance of quantum computers. It serves as a benchmark to the progress being made by quantum computers to solve real-world problems.

QV takes into account a number of factors effecting quantum computations including qubits, connectivity, and gate and measurement errors. Material improvements to underlying physical hardware, such as increases in coherence times, reduction of device crosstalk, and software circuit compiler efficiency, can point to measurable progress in Quantum Volume, as long as all improvements happen at a similar pace, details the IBM website.

Raleigh reached a Quantum Volume of 32 this year, up from 16 last year. This improvement stems from an improved hexagonal lattice connectivity structure with improved coherence aspects.  According to IBM, the lattice connectivity had an impact on reduced gate errors and exposure to crosstalk.

Over the last year, a number of quantum computing achievements have been reached, notes IBM. Among the highlights was the offering of quantum computing services by a number of traditional cloud providers. Naturally, IBM was on that list. Other notables were Amazon, which in December 2019 first offered select enterprise customers the ability to experiment with quantum-computing services over the cloud.

The Amazon platform will let clients explore different ways to benefit from quantum computers by developing and testing quantum algorithms in simulations. For example, quantum computers could be used for simulating climate change, solving optimization problems, cybersecurity and quantum chemistry, among others. Clients will also have access to early-stage quantum-computing hardware from providers including D-Wave Systems Inc., IonQ Inc. and Rigetti Computing.

Now let’s see have the Quantum Volume measurement relates to transistor performance as delineated by Moore’s Law.

Image Source: IBM / Quantum Volume Growth Chart
top-10-2019-engineering,-science,-and-technology-awards

Luminaries from 2019 were awarded for their work in cosmology, photonics, GPS systems, video processing, semiconductors, brain neurons and more.

  • Each year reveals further advances in the disciplines of technology, engineering and science. In recognition of these yearly advances, key individuals are awarded with honors and prizes from a variety of very different organizations. These organizations include the National Academy of Sciences, the Nobel Prizes, various IEEE societies, Queen Elizabeth bi-annual prize, the Emmy’s Engineering award – and more.  Ten of the best of these awards have been collected to highlight the broad range of the achievements in 2019.

  • 2019 Nobel Prize in Physics

    “The Royal Swedish Academy of Science Nobel Prize in Physics recognizes both theoretical and experimental contributions to understanding the universe. This year, the prize is awarded to APS Fellow James Peebles (Princeton University), Michel Mayor (University of Geneva), and Didier Queloz (University of Geneva; University of Cambridge). 

    Half of the prize is awarded to Peebles for his theoretical insights into physical cosmology that have impacted the trajectory of cosmology research for the past 50 years and form the basis of the current ideas about the universe. The other half of the prize is awarded jointly to Mayor and Queloz for the first discovery of an exoplanet orbiting a solar-type star in the Milky Way in 1995.”

    Image Source: MLA style: The Nobel Prize in Physics 2019. NobelPrize.org. Nobel Media AB 2019. Thu. 19 Dec 2019. https://www.nobelprize.org/prizes/physics/2019/summary/

  • Comstock Prize in Physics

    “Michal Lipson, Columbia University, received the 2019 Comstock Prize in Physics. Her pioneering research established the groundwork for silicon photonics, a growing field in which she remains a pioneer and leader. The technology, which uses optical rays to transfer data among computer chips, is now considered to be one of the most promising directions for solving major bottlenecks in microelectronics.

    Lipson developed techniques to tailor the electro-optic properties of silicon that led to the first advances in silicon photonics, including demonstrating the ability to confine light well beyond the traditional diffraction limit using what she termed “slot waveguides.” These waveguides are being applied for many applications, including telecommunications, bio-sensing, and on-chip transport of nanoparticles.”

  • Queen Elizabeth Prize for Engineering

    “The Queen Elizabeth Prize for Engineering, also known as the QEPrize, is a global engineering prize that rewards and celebrates the engineers responsible for a ground-breaking innovation in engineering that has been of global benefit to humanity. The £1 million prize is awarded biennially in the name of Queen Elizabeth II. The 2019 prize went to four US engineers – Dr Bradford Parkinson, Professor James Spilker, Hugo Fruehauf, and Richard Schwartz for the creation of the first truly global, satellite-based positioning system (GPS). Parkinson won the prize for leading the development, design, and testing of key GPS components. James Spilker, Jr was awarded for developing the L-band GPS civil signal structure using CDMA. Hugo FrueHauf was honored for his instrumental role creating a highly accurate miniaturized atomic clock using a rubidium oscillator. Finally, Richard Schwartz won the prize for leading the design and development of the highly robust, long-lasting Block I satellites.”

  • Engineering Emmy Awards

    The Television Academy awarded Hugo Gaggioni with the Charles F. Jenkins Lifetime Achievement Award for 2019. This award honors a living individual whose ongoing contributions have significantly affected the state of television technology and engineering.

    In his storied 31-year tenure at Sony Electronics, Hugo Gaggioni has achieved many scientific and technical accomplishments and is widely known for his unique ability to present and explain complex technical concepts to professionals and civilians alike. He now serves as chief technology officer of the broadcast and production systems division, pursuing his research interests in digital video image processing, information theory, audio/video bandwidth compression, HDTV devices and systems, digital filter banks, and multidimensional signal processing.  He is a Society of Motion Picture and Television Engineers (SMPTE) fellow and recipient of both the David Sarnoff and the Leitch Medals.

  • IEEE History Committee Honors Jimmy Soni and Rob Goodman

    Jimmy Soni and Rob Goodman have been honored by IEEE History Committee for their book, “A Mind at Play: How Claud Shannon Invented the Information Age” (Simon and Schuster, 2017). Both authors were chosen as the winners of the 2019 IEEE William and Joyce Middleton Electrical Engineering History Award. Established in 2014, this award recognizes annually the author of a book (published within the previous three years) in the history of an IEEE-related technology that both exemplifies exceptional scholarship and reaches beyond academic communities toward a broad public audience. Most of the Center’s resources are available online at the Engineering and Technology History Wiki

    “In their second collaboration, the biographers present the story of Claude Shannon—one of the foremost intellects of the twentieth century and the architect of the Information Age, whose insights stand behind every computer built, email sent, video streamed, and webpage loaded. Claude Shannon was a groundbreaking polymath, a brilliant tinkerer, and a digital pioneer. He constructed the first wearable computer, outfoxed Vegas casinos, and built juggling robots. He also wrote the seminal text of the digital revolution, which has been called “the Magna Carta of the Information Age.” In this elegantly written, exhaustively researched biography, Soni and Goodman reveal Claude Shannon’s full story for the first time.”

  • IEEE Robert Noyce Awards

    The IEEE Robert N. Noyce Medal honors of Robert N. Noyce, founder of Intel Corporation. He was renowned for his 1959 invention of the integrated circuit and for leadership in the research and development of advanced microelectronic design automation tools. The 2019 recipient of this award was Antun Domic, Chief Technical Officer, at Synopsys.

    “The electronic design automation (EDA) tools, methodologies, and flows developed under Antun Domic’s leadership have driven the state of the art in digital microelectronics for almost three decades and have enabled the continued miniaturization of the electronic components that power today’s applications. EDA makes possible the creation of complex electronic systems with computer software that aids in the design, verification, and testing processes and helps detect and eliminate bugs and defects in chips and circuit boards. The EDA tools developed under Domic’s leadership while at Synopsys and other companies have impacted the creation of a large number of the world’s most advanced microelectronic components by enabling the design of chips containing billions of gates from high-level synthesis through physical layout and verification, including timing, power, area, and test optimization, all the way to the final design result.”

  • Global Semiconductor Alliance (GSA) Awards

    Global Semiconductor Alliance (GSA) recognizes semiconductor companies that have demonstrated excellence through their success, vision, strategy and future opportunities in the industry at its annual Awards Dinner Celebration. The Dr. Morris Chang Exemplary Leadership Award, sponsored by the Global Semiconductor Alliance (GSA), recognizes individuals for their exceptional contributions to drive the development, innovation, growth and long-term opportunities for the semiconductor industry. The recipient of this award for 2019 was James (Jim) C. Morgan, Chairman Emeritus of Applied Materials, Inc.

    “Applied Materials develops technology and equipment used to produce virtually every new chip and advanced display in the world. Morgan ran Applied for nearly three decades— one of the longest tenures of a Fortune 500 CEO. He has been acknowledged for his numerous contributions within the technology industry and around the world for his leadership within the community. He advised three U.S. Presidents on matters of trade and competitiveness, serving on the National Advisory Committee on Semiconductors. He is also a recipient of the IEEE Robert N. Noyce Medal for his vision and leadership that transformed Applied Materials into an innovation leader and global partner for advancing microelectronics manufacturing technology.”

  • EDA Phil Kaufman Award

    Presented by the Electronic System Design (ESD) Alliance and the IEEE Council on Electronic Design Automation, this award honors an individual who has had demonstrable impact on electronic design through contributions in the field of EDA. The recipient for 2019 is Dr. Mary Jane Irwin.

    “Dr. Irwin has been honored for her extensive contributions to EDA through her technical efforts, service to the community and leadership. During her tenure at Pennsylvania State University, she mentored countless students and contributed to technology through her substantial research and numerous publications. Her research included creating EDA tools then using them in computer architecture research, an approach that gave Dr. Irwin influence in both academia and industry.”

  • National Academy of Sciences

    Liqun Luo, Stanford University, received the 2019 Pradel Research Award. This award is presented annually to recognize mid-career neuroscientists whose work is making major contributions to our understanding of the nervous system.

    “Luo has conducted pioneering research, often using techniques of his own invention, to improve our understanding of how neural circuits in the brain assemble and how they are organized to allow information processing. One of Luo’s early achievements was the development of Mosaic Analysis with a Repressible Cell Marker (MARCM), a genetics technique for specifically labelling isolated mutant cells within an otherwise normal fruit fly, a model organism for genetics research. This allowed Luo to study single neurons within a complex brain, which enabled him to make fundamental breakthroughs in our understanding of the fly’s brain development. In particular, Luo focused on the olfactory system and has identified numerous genetic elements that control neuronal wiring and made the olfactory system as a model for understanding neural circuit assembly in all species.”

  • DesignCon Engineer-of-the-Year Award

    DesignCon’s “Engineer of the Year” Award is given out each year during the DesignCon event. The award seeks to recognize the best of the best in engineering and new product advancements at the chip, board, or system level. The award winner will be selected based on his or her leadership, creativity, and out-of-the-box thinking brought to design/test of chips, boards, or systems, with particular attention paid to areas of signal and power integrity.

    This year’s award went to Vishram Pandit for his ability to share knowledge with the technical community that will one day create the CPUs for next-generation cars, phones, and servers. He has co-authored a book on Power Integrity for I/O Interfaces, and is co-author of approximately 30 conference and journal publications, out of which 19 were presented at DesignCon. Those papers have received 3 best paper awards and 3 finalist awards. Vishram received the 2018 Albert Nelson Marquis Lifetime Achievement Award for his contributions to the Signal and Power integrity field.

John Blyler is a Design News senior editor, covering the electronics and advanced manufacturing spaces. With a BS in Engineering Physics and an MS in Electrical Engineering, he has years of hardware-software-network systems experience as an editor and engineer within the advanced manufacturing, IoT and semiconductor industries. John has co-authored books related to system engineering and electronics for IEEE, Wiley, and Elsevier.

keynotes-worth-seeing-at-designcon-2020

What do these topics have in common?

  1. The Future of Fiber Optic Communications: Datacenter and Mobile
  2. Design for Security: The Next Frontier of Smart Silicon
  3. Microchips in Space: How Device Design Enables Amazing Astronomy

The answer is that all use microchips and microsystems but in very different ways and for differing motivations.

In the first one, complex system-on-chips (SoC) are integrated with fiber optics to enable dizzyingly fast high-speed connections between processors, memory storage, and interfaces in data rooms and mobile devices across the world.

With so much going on in the world of fiber optic communications, it’s important for designers to keep up to date with the basic engineering issues. The catalyst for this interest is that the global fiber optics market is predicted to grow from 5 billion USD in 2018 to 9 billion USD by the end of 2025.

In his upcoming keynote at Designcon 2020, Chris Cole, VP of Advanced Development at II-VI, will discuss past trends and new developments in fiber optics for datacenter and mobile applications. Two ongoing trends are the replacement of copper wires by fiber optics in the data room as well as the replacement of direct detection by coherent detection in optical systems.

Cole will also explain the major limitations of power and density in communications, and new technologies like Silicon Photonics (SiPh) and co-packaging. Silicon photonics involves the study of optical properties of the group-IV semiconductor and how it can be used to generate, manipulate and detect light. Silicon is prevalent in photodetectors and solar cells, among other technologies.

To learn more, visit: The Future of Fiber Optic Communications: Datacenter

Image Source: Imec
vote-for-the-2020-engineer-of-the-year

Now is the time to cast your vote for the DesignCon 2020 Engineer of the Year. This award is given out each year during the DesignCon event and seeks to recognize the best of the best in engineering and new product advancements at the chip, board, or system level, with a special emphasis on signal integrity and power integrity.

Editors of Design News and the staff of DesignCon would like to offer hearty congratulations to the finalists. For this year’s award, the winner (or his/her representative) will be able to direct a $1,000 donation to any secondary educational institution in the United States. The details on each nominee are below as provided in their published biographies and by the person/s who made the nomination. Please cast your vote by following this link.

Voting closes at noon Pacific Time on Friday, December 27. The winner will be announced at DesignCon 2020, January 28-30, at the Santa Clara Convention Center, Santa Clara, CA.

The six finalists for the 2020 DesignCon Engineer of the Year Award are (click each name to see finalist’s bio and community activity):

Cast your vote for the 2020 Engineer of the Year by noon PT, December 27.

See the Official Rules of the Engineer of the Year Award

Please click here to learn more about DesignCon and register to attend

Jay Diepenbrock

Consultant, SIRF Consultants LLC

DesignCon 2020 Engineer of the Year finalist Jay Diepenbrock from SIRF ConsultantsJoseph C. (Jay) Diepenbrock holds an Sc. B. (EE) from Brown University and an MSEE from Syracuse University. He worked in a number of development areas in IBM including IC, analog and RF circuit, and backplane design. He then moved to IBM’s Integrated Supply Chain, working on the electrical specification, testing, and modeling of connectors and cables and was IBM’s Subject Matter Expert on high speed cables. After a long career at IBM he left there and joined Lorom America as Senior Vice President, High Speed Engineering, and led the Lorom Signal Integrity team, supporting its high speed product development. He left Lorom in 2015 and is now a signal integrity consultant with SIRF Consultants, LLC. 

Holding 12 patents, 30 publications, and a recognized expert in SI, Jay is currently the technical editor of the IEEE P370 standard and has worked on numerous other industry standards. He is a Senior Member of the IEEE and was an EMC Society Distinguished Lecturer. Jay has a steadfast commitment to solid engineering and communicating/teaching about it. He regularly contributes to industry discourse and education at events and in trade publications. He has made a distinguished career in high-speed product development, including backplane design, high speed connectors and cables, and signal integrity consulting. Beyond that, Jay actively volunteers his time for disaster and humanitarian relief around the world, including being part of the IEEE MOVE truck, which provides emergency communications during and after a disaster. He truly uses his engineering skills to make the world a better place.

Jay is a long-time, active member of the DesignCon Technical Program Committee.

This year at DesignCon, Jay will be presenting the tutorial “Introduction to the IEEE P370 Standard & Its Applications for High Speed Interconnect Characterization” and speaking in the panel “Untangling Standards: The Challenges Inside the Box.”

Cast your vote for the 2020 Engineer of the Year by noon PT, December 27.

Vladimir Dmitriev-Zdorov

Senior Key Expert, EBS Product Development, Mentor, A Siemens Business

DesignCon 2020 Engineer of the Year finalist Vladimir Dmitriew-Zhorov from Mentor, A Siemens BusinessDr. Vladimir Dmitriev-Zdorov has developed a number of advanced models and novel simulation methods used in Mentor products. His current work includes development of efficient methods of circuit/system simulation in the time and frequency domains, transformation and analysis of multi-port systems, and statistical and time-domain analysis of SERDES links. He received Ph.D. and D.Sc. degrees (1986, 1998) based on his work on circuit and system simulation methods. The results have been published in numerous papers and conference proceedings, including DesignCon. Several DesignCon papers such as “BER-and COM-Way of Channel-Compliance Evaluation: What are the Sources of Differences?” and “A Causal Conductor Roughness Model and its Effect on Transmission Line Characteristics” have received the Best Paper Award. Dr. Vladimir Dmitriev-Zdorov holds 9 patents.

Vladimir is an active member of the DesignCon Technical Program Committee.

This year at DesignCon, Vladimir will be presenting the technical session, “How to Enforce Causality of Standard & “Custom” Metal Roughness Models” and on the panel “Stump the SI/PI Experts.”

Cast your vote for the 2020 Engineer of the Year by noon PT, December 27.

Tim Hollis

Fellow, Micron Technology

DesignCon 2020 Engineer of the Year finalist Tim Hollis from Micron TechnologiesTim Hollis is a distinguished member of the Macron Technologies technical staff and an advanced signaling R&D lead. His main focus is in identifying and directing forward-looking projects for the SI R&D team to pursue and driving a cross-functional working group intended to provide forward-looking technical guidance to upper management.

Tim has shown outstanding technical leadership in solving numerous challenges with regard to high-speed DDR memory interfaces, for both computing and graphics applications. He has contributed papers to DesignCon as received a Best Paper Award in 2018 as lead author for “16Gb/s and Beyond with Single-Ended I/O in High-Performance Graphics Memory.” His 85 patents reflect his innovative mind and his prodigious contributions to technology.

Tim received a BS in Electrical Engineering from University of Utah and a Ph.D. in Electrical Engineering from Brigham Young University.

Cast your vote for the 2020 Engineer of the Year by noon PT, December 27.

Istvan Novak

Principle SI and PI Engineer, Samtec

DesignCon 2020 Engineer of the Year finalist Istvan Novak from SamtecIstvan Novak is a Principle Signal and Power Integrity Engineer at Samtec, working on advanced signal and power integrity designs. Prior to 2018 he was a Distinguished Engineer at SUN Microsystems, later Oracle. He worked on new technology development, advanced power distribution and signal integrity design and validation methodologies for SUN’s successful workgroup server families. He introduced the industry’s first 25um power-ground laminates for large rigid computer boards, and worked with component vendors to create a series of low-inductance and controlled-ESR bypass capacitors. He also served as SUN’s representative on the Copper Cable and Connector Workgroup of InfiniBand, and was engaged in the methodologies, designs and characterization of power-distribution networks from silicon to DC-DC converters. He is a Life Fellow of the IEEE with twenty-five patents to his name, author of two books on power integrity, teaches signal and power integrity courses, and maintains a popular SI/PI website.

Istvan has in many cases single handedly helped the test and measurement industry develop completely new instruments and methods of measurement. New VNA types and Scope probes and methodologies are in the market today thanks to Istvan’s efforts and openness to help others. He was responsible for the power distribution and high-speed signal integrity designs of SUN’s V880, V480, V890, V490, V440, T1000, T2000, T5120 and T5220 midrange server families. Last, but not least, Istvan has been a tremendous contributor to SI List, educating and helping engineers across the world with their SI/PI problems. Istvan is an active member of the DesignCon Technical Program Committee, sharing his expertise by participating in the review of content for multiple tracks. He is an IEEE Fellow and has been a tutor at the University of Oxford, Oxford, UK for the past 10 years. He has also been a faculty member at CEI Europe AB since 1991 and served as Vice Dean of Faculty, Associate Professor at the Technical University of Budapest.

At DesignCon 2020, Istvan will be participating in the technical session, “Current Distribution, Resistance & Inductance in Power Connectors,” and the panel, “Stump the SI/PI Experts.”

Cast your vote for the 2020 Engineer of the Year by noon PT, December 27.

Michael Schnecker

Business Development Manager, Rohde & Schwarz

DesignCon 2020 Engineer of the Year finalist JMichael Schnecker from Rohde & SchwarzMichael Schnecker’s experience in the test and measurement industry includes applications, sales and product development and specialization in signal integrity applications using oscilloscopes and other instruments. Prior to joining Rohde & Schwarz, Mike held positions at LeCroy and Tektronix. While at LeCroy, he was responsible for the deployment of the SDA series of serial data analyzers.    

Mike has more than two decades of experience working with oscilloscope measurements. His background in time and frequency domains provides him with unique insight into the challenges engineers face when testing high-speed systems for both power and signal integrity. Interacting with engineers in the industry daily has allowed Mike to master the ability to explain complex measurement science to engineers at any level. He also holds several patents, including methods and apparatus for analyzing serial data streams as well as coherent interleaved sampling. Thus, Mike is recognized as a thought leader and exceptional mentor in the signal and power integrity community.

Mike has a BS from Lehigh University and an MS from Georgia Tech, both in electrical engineering. 

This year at DesignCon, Mike will be presenting the tutorial “Signal Integrity: Measurements & Instrumentation“ and at the technical session, “Real-Time Jitter Analysis Using Hardware Based Clock Recovery & Serial Pattern Trigger.”

Cast your vote for the 2020 Engineer of the Year by noon PT, December 27.

Yuriy Shlepnev

President and Founder, Simberian

DesignCon 2020 Engineer of the Year finalist Yuriy Shlepnev from SimberianYuriy Shlepnev is President and Founder of Simberian Inc., where he develops Simbeor electromagnetic signal integrity software. He received M.S. degree in radio engineering from Novosibirsk State Technical University in 1983, and the Ph.D. degree in computational electromagnetics from Siberian State University of Telecommunications and Informatics. He was principal developer of electromagnetic simulator for Eagleware Corporation and leading developer of electromagnetic software for simulation of signal and power distribution networks at Mentor Graphics. The results of his research are published in multiple papers and conference proceedings.

Yuriy conceived and brought to market a state of the art electromagnetic field solver tool suite and is considered an expert in his field and regularly posts teaching videos. He is a senior member of IEEE AP, MYY, EMC, and CPMT societies. He is also a Fellow of Kong’s Electromagnetics Academy and a member of the Applied Computational Electromagnetics Society (ACES).

Yuriy is active in the Technical Program Committee for DesignCon and has served a track co-chair in the past. At DesignCon this year he will be presenting the tutorial “Design Insights from Electromagnetic Analysis & Measurements of PCB & Packaging Interconnects Operating at 6- to 112-Gbps & Beyond” and speaking in the technical session “Machine Learning Applications for COM Based Simulation of 112Gb Systems.”

Cast your vote for the 2020 Engineer of the Year by noon PT, December 27.

Learn more about DesignCon and register to attend

the-9-most-disruptive-tech-trends-of-2019

What were the breakthrough technologies for 2019? The answer depends on who you ask. Several common themes have emerged such as cobots, emerging energy source, AI, and cybersecurity breaches. Let’s consider each in more detail.

1.) Robotics – collaborative robots (or cobots)

(Image source: OpenAI and Dactyl)

Remember Dum-E (short for dummy) from the first Iron Man movie? Dum-E was a cobot that helped Tony Stark created his flying robotic suit. It was a scaled down, more human, interactive version of the traditional industrial-grade manufacturing line arm robots.

Cobots are designed to collaboratively work alongside human with a gentle touch, i.e., to not smash fingers or step on the toes of their work buddies. Doing so requires that cobots be much more aware of their location in relation to the humans, via sensing and perception technologies. To achieve this goal, one company, Veo Robotics, uses a variety of 3D sensors placed around the robot’s workcell to aid in location awareness. The company’s sensors add an extra measure of safety by automatically slowing down the movement of the industrial cobots whenever a human co-worker comes close.

To help supplement actual human activity, cobots are becoming more dexterous and moving beyond merely picking components on an assembly line. Robots need greater dexterity to pick up objects that have moved even slightly beyond their programmed parameters. Cobots cannot yet grasp any object just by looking at it, but they can now learn to manipulate an object on their own. 

OpenAI, a nonprofit company, recently introduced Dactyl, a dexterous robotic arm that taught itself to flip a toy building block in its fingers. Dactyl uses neural network software to learn how to grasp and turn the block within a simulated environment before the hand tries it out for real. According to the company, they’ve been able to train neural networks to solve the Rubik’s Cube Problem using reinforcement learning and Kociemba’s algorithm for picking the solution steps.

who’s-left-to-make-chip-development-tools?

Here’s a look at the remaining major EDA tool companies after years of consolidation.

  • The EDA market continues to consolidate. At this year’s 2019 Design Automation Conference (DAC), Rich Valera from Needham and Company noted that since the collapse of the tech bubble in the early 2000’s, the EDA market has been all about consolidation.

    “Many larger scale private companies, including multiple “near IPO’s” – e.g., Denali, Tensilica, Apache, and Spyglass (Atrenta), – have been bought before going public in the last 15 years,” explained Valera. “It goes without saying that the EDA industry has become very concentrated, one could argue an oligopoly, with most of the revenue driven by 3 major companies.”

    The above graphic does not include many of the more recent consolidations:

    Cadence acquisition of AWR from National InstrumentsInphi Corp acquired the majority of eSiliconSynopsys acquired DINI Group, QTronic GmbH and certain assets of eSiliconDassault Systemes acquisition of CST

    The number of private EDA startup company exits through acquisitions or going public (IPOs) has been declining, which is probably attributed to fewer companies being formed. Additionally, the time to exit for startup EDA companies has generally been well over 10 years. This is a long time period for most startups and their investors, which may explain the modest amount of venture capital funding flowing into EDA.

  • It would seem that the main EDA tool vendors have formed an oligopoly, i.e., Synopsys, Cadence and Mentor Graphics (recently acquired by Siemens PLM). According to Valera, one might expect to see less competition, reduced investment and a push to maximize profits – say, as opposed to growing into new markets. This has not been the case. Rather, the combined Cadence/Synopsys research and development (R&D) budget has been on a generally upward trend over the last 10 years, which is a positive activity as it relates to job growth.

    The three major EDA companies have realized healthy growth thanks to their movement into new application areas like autonomous vehicle electronics, ongoing advancement and roll-outs in industrial and commercial IOT, AI and edge-cloud computing.

    What about the other EDA tool vendors? According to Crunchhub, there are 132 organizations listed as semiconductor EDA companies, not including fabs like TSMC and OEMs like Intel. But we don’t need to consider all EDA companies to understand what makes up this industry. Instead, let’s consider the top 8 EDA tool providers.

  • Synopsys

    In 1986, a small synthesis startup called Optimal Solutions was created by a team of engineers from GE Microelectronics Center in Research Triangle Park, N.C. The team included Dr. de Geus, who would later become the CEO. Shortly thereafter, the company moved to Mountain View, Calif., to become Synopsys (for SYNthesis and OPtimization SYStems). Their first task was to focus on commercializing an automated logic synthesis “Design Compiler” tool. Today, Synopsys has a suite of chip design and verification tools plus verification intellectual property (IP).

    One of the significant announcements from Synopsys in 2019 was the completion of its acquisition of the DINI Group, an FPGA-based boards and solutions company. SoC designers are deploying FPGA-based prototyping platforms to enable rapid software development in automotive, artificial intelligence (AI), 5G, and high-performance computing (HPC) applications.

    DINI’s FPGA boards are frequently used to create a complete logic prototyping system that can emulate up to 130 million ASIC gates with over 20 FPGAS.

  • Cadence Design Systems

    Two small startups that emerged in the early 1980’s – Solomon Design Automation and ECAD – grew and merged to form Cadence Design Systems in 1988. Shortly thereafter, Cadence bought Gateway Design Automation, a developer of the Verilog hardware description language. A year later Cadence put Verilog into the public domain, and it became the most widely used hardware description language. In the ensuring year, Cadence pushed into the custom/analog design automation tool market and later IC layout automation.

    Today, Cadence offers a broad portfolio of tools to address an array of challenges related to custom IC / Analog / RF Design, digital, IC package, and PCB design and system-level verification.

    One of the more interesting announcements in 2019 was the introduction of a complete electrical-thermal co-simulation solution for ICs to physical enclosures. The thermal solver integrated with the company’s IC, package and PCB implementation platforms. Design insights from the solver will help design teams detect and mitigate thermal issues early in the design process, thus reducing electronic system development iterations.

  • Mentor Graphics (A Siemens PLM Company)

    Mentor Graphics was founded in 1981 by a small group of engineers in Oregon. All had left Tektronix to form Mentor Graphics, one of the first commercial EDA companies, along with Daisy Systems and Valid Logic Systems. Mentor Graphics was also the first EDA company that had its software run on a non-proprietary hardware system, i.e., the Apollo Computer workstations.

    Today, the company offers chip design, PCB design, systems, automotive, CAE Simulation and Test and Embedded tools. Mentor is involved in EDA, printed circuit board and system-of-system level design.

    One of the announcements this year was in the area of high-level-synthesis (HLS) for edge computing networks. The challenge is that moving machine learning to the edge has critical requirements on power and performance. Using off-the-shelf solutions like CPUs or GPUs are too slow or too expensive, respectively. Even generic machine learning accelerators can be overbuilt and are not optimal for power. That’s why HLS tools can help create new power/memory efficient hardware architectures to meet machine learning hardware demands at the edge.

  • ANSYS

    Ansys was founded in 1970 by John Swanson. In 1996, the company went public. During the next five years, Ansys made numerous acquisitions to gain additional technology for fluid dynamics, electronics design, and other physics analysis.

    The company develops and markets engineering simulation software used to design products and semiconductors, as well as to create simulations that test a product’s durability, temperature distribution, fluid movements, and electromagnetic properties.

    As an example of the company’s simulation capabilities, TURBOTECH is using Ansys fluids tools to potentially redesign aeronautical propulsion. TURBOTECH is developing an energy storage system capable of powering the hybrid-electric aircraft of the future. The idea is to develop regenerative cycle turbogenerators based on small turbines that recover energy from exhaust gases to reduce fuel consumption. By recharging batteries in-flight, the turbogenerators claim to improve the endurance of electric aircrafts by 10x — enabling significant weight and cost savings. The turbogenerators can produce electricity from virtually any type of renewable flammable material, including bio-fuel, bio-gas, hydrogen and conventional fuels.

  • Keysight Technologies

    Keysight Technologies’ can trace its origins back to the original Hewlett-Packard business founded in 1939 by Bill Hewlett and Dave Packard. In 1999, the HP spun off Agilent Technologies in 1999. Five years later, Agilent spun off Keysight Technologies as a wireless, semiconductor and aerospace test and measurement company.

    Significant news in 2019 includes the partnership with Marvin Test Solutions to develop advanced beamformer integrated circuit (IC) test technology to accelerate the production of high performance 5G chips and test associated mmWave antenna systems. To ensure reliable and efficient 5G mmWave communications, the performance of critical elements that form part of the beamformer chips need to be rigorously tested under linear and nonlinear conditions.

    Also noteworthy is the company’s simulation software that is being used for rapid development, integration and test of sophisticated electronic warfare (EW) systems with real-time RF modeling. Software and hardware simulation systems are needed so engineers can test their EW designs by easily generating specific RF environments.

  • Zuken

    Zuken is a Japanese-based company that started out in CAD systems in 1976. The company’s software is primarily used for designing printed circuit boards (PCBs), Multi-Chip Modules (MCM), and for the engineering of electrotechnical, wiring, wiring harness, pneumatics and hydraulics applications.

    Recently, Zuken moved firmly into the systems-of-systems engineering and model-based-systems engineering (MBSE) spaces with the acquisition of ViTech. This acquisition required the approval of the US Department of Defense (DoD) and the Committee on Foreign Investment in the United States (CFIUS). Vitech was a US company with more than 25 years of industry experience in systems engineering.

    In the fall of 2019, Zuken reinforced it’s presence in the world of digital twins by agreeing to develop system design and manufacturing process interfaces to Dassault Systèmes (DS) 3DEXPERIENCE platform. Zuken will provide electronic libraries and design data management capabilities within DS’s platform to enable cross-discipline systems engineering and traceability.

    In particular, Zuken’s component management process will permit the transfer, synchronization and authorization of component metadata and related files between the databases of the two companies. Zuken’s integration will enable creation and lifecycle management of electronic systems from the Dassault Systemes’s platform.

  • Altium

    Altium was founded in 1985 by Nick Martin as a PCB Computer-Aided Design (CAD) vendor. The company has continued to improve its original product over the last several decades, e.g., Altium Designer. Improvements in 2019 provide for a faster schematic editor, high-speed design and enhanced interactive router for PCB design.

    This year, the company also unveiled a cloud-based application for CAD component management. It may seem un-glamorous but selecting and managing components in the development of a PCB is critical to design and cost.

    The effective creation and reuse of component data in the PCB design process, including footprints, schematic symbols, and 3D models, is critical in meeting tight time-to-market windows. Until now, most PCB designers have created and stored component data in private file systems rather than in a shared, managed, and maintained library. Others have tried to use shared spreadsheets or proprietary databases. These outdated approaches led to multiple re-design cycles due to redundant, inaccurate or outdated component data that is often discovered only late in the product development process, when board designs are sent to manufacturers.

  • Applied Wave Research (AWR)

    Several former companies providing EDA tools (like CST and AWR), FPGA boards systems (like DINI) and design services (like eSilicon) have been “removed” through acquisitions from the official list of EDA companies. Yet the brands and product live on either as the original brand or under the flag of the acquiring company. Let’s look at the most recent of these acquired EDA vendors.

    AWR was founded in 1994 to improve the design efficiency for radio frequency and microwave circuit and system design. After several prior acquisitions, AWR was acquired by National Instruments (NI) in 2011. A further acquisition by Cadence was announced in late 2019.

    AWR software is used for radio frequency (RF), microwave and high frequency analog circuit and system design. Recently, The Italian National Institute for Astro Physics of the Institute of Radio Astronomy (INAF-IRA) used NI AWR software to design the circuitry of the receiver chains for a multi-channel heterodyne receiver antenna for radio astronomy applications operating across the 2.3–8.2 GHz RF band.  

    Large-scale surveys using highly sensitive electronics are an essential tool for new discoveries in radio astronomy. INAF designers were challenged to develop, fabricate, and test a room temperature, multi-channel heterodyne receivers needed for radio astronomy applications. AWR software helped in the critical modeling and design of the phased array for reflector observing systems (PHAROS) which uses a super-cooled feed with an analog beamformer.

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    John Blyler is a Design News senior editor, covering the electronics and advanced manufacturing spaces. With a BS in Engineering Physics and an MS in Electrical Engineering, he has years of hardware-software-network systems experience as an editor and engineer within the advanced manufacturing, IoT and semiconductor industries. John has co-authored books related to system engineering and electronics for IEEE, Wiley, and Elsevier.

Electronic design automation (EDA) are the software tools used for designing electronic systems, such as system-on-chip (SoC) integrated circuits and printed circuit boards. The tools work in a design-verification flow that chip designers use to analyze and develop semiconductor chips.

But the EDA tool market has gone through massive consolidation over the couple of decades. Which companies are left? We’ll find out.

growth-returns-to-semiconductor-and-eda-tools-m&a-markets-–-for-now

2019 was a great time for merger and acquisition business in the semiconductor and electronic design automation tools industries. But what will the future hold?

There was an uptick in M&A activity for the semiconductor space in the first eight months of 2019. This was a welcome change after the market slowing in 2017 and 2018. The combined value of 20-plus M&A agreement announcements reached over $28 billion for the purchase of chip companies, business units, product lines, intellectual property (IP), and wafer fabs between January and the end of August – according to the Fall 2019 IC Insight’s McClean Report. This amount does not include transactions between semiconductor capital equipment suppliers, material producers, chip packaging and testing companies, and electronic design automation (EDA) software firms.

The activity in the first eight months of 2019 have surpassed the $25.9 billion total for all of 2018.

Image Source: IC Insights

no-quartz-needed:-the-world’s-first-crystal-less,-wireless-mcu-improves-iot-designs
Texas Instruments, bulk acoustic wave, BAW, crystal devices, IoT
BAW can enable the next generation of industrial and telecommunication applications by changing how we approach system designs today. (Image source: Texas Instruments)

From blood glucose, blood pressure, and oxygen saturation monitors in the medical sector, to temperature and smoke detectors used in building automation, to e-locks used in building security, wireless microcontrollers (MCU) play a vital role in monitoring and connecting the world around us.

With this in mind, one of the most important innovations in business and commerce remains the ability to move and analyze massive amounts of data. Wireless MCUs and wireless networking are essential to data migration. And the ability to bridge the last mile of data through connected Internet of Things (IoT) devices is a vital part of that journey.

IoT building blocks include sensors that use quartz crystals. Discrete clocking and quartz crystal devices used to achieve wireless connections can be costly, time-consuming, and complicated to develop, however, and are often susceptible to environmental stress in factory automation or automotive applications.

A new technology called bulk acoustic wave (BAW) makes it possible to create simpler, smaller MCU designs while increasing overall performance and lowering costs. BAW can enable the next generation of industrial and telecommunication applications by changing how we approach system designs today.

As shown in Figure 1 (below) BAW consists of a piezoelectric material sandwiched between two electrodes that converts electrical energy to mechanical-acoustical energy, and vice versa. The mechanical resonance of the piezoelectric material generates the clock for the system.

Texas Instruments, bulk acoustic wave, BAW, crystal devices, IoT

Figure 1: ABAW piezoelectric material. (Image source: Texas Instruments)

The SimpleLink CC2652RB MCU from Texas Instruments integrates BAW technology within a wireless MCU package, eliminating the need for an external quartz crystal, which can be costly, bulky, and time-consuming to design. The space savings enabled by crystal-less solutions is crucial in many emerging applications, such as medical IoT devices.

Compared to external crystal MCU solutions, the SimpleLink C2652RB also shows significant resistance to a variety of acceleration forces and mechanical shock. 

How BAW technology resists mechanical shock and vibration

Two important parameters for measuring vibration and shock are the acceleration force and vibration frequency applied to IoT-connected devices. You’ll find sources of vibration anywhere: inside a moving vehicle; a cooling fan in equipment; or even a handheld wireless device. It is important that clock solutions provide a stable clock with strong resistance against acceleration forces, vibration, and shock, as this assures stability throughout product life cycles under process and temperature variations.

Vibrations and mechanical shock affect resonators by inducing noise and frequency drift, degrading system performance over time. In reference oscillators, vibration and shock are common causes of elevated phase noise and jitter, frequency shifts and spikes, or even physical damage to the resonator and its package. Generally, external disturbances can couple into the microresonator through the package and degrade overall clocking performance.

One of the most critical performance metrics for any wireless device is to maintain a link between the transmitter and receiver and prevent data loss. Without the need for a crystal, BAW technology provides significant performance benefits for IoT products operating in harsh environments. Because BAW technology ensures stable data transmission, data syncing over wired and wireless signals is more precise and makes continuous transmission possible, which means that data can be processed quickly and seamlessly to maximize efficiency.

Evaluating BAW technology with high industry standards

TI has tested the CC2652RB thoroughly against relevant military standards because many MCUs operate in environments susceptible to shock and vibration, such as factories and automotive vehicles. Military standard (MIL)-STD-883H, Method 2002 is designed to test the survivability of quartz crystal oscillators. This standard subjects semiconductor devices to moderate or severe mechanical shock (with an acceleration peak of 1500 g) caused by sudden forces or abrupt changes in motion from rough handling, transportation, or field operation. Shocks of this type could disturb operating characteristics or cause damage similar to what could result from excessive vibration, particularly if the shock pulses are repetitive.

Figure 2 shows a mechanical shock test setup for MIL-STD-883H, while Figure 3 shows the frequency variation of the CC2652RB compared to an external crystal solution. You can see that the maximum frequency deviation is about 2 ppm, while the external crystal solution is about 7 ppm at 2.44 GHz.

Texas Instruments

Figure 2: Mechanical shock test setup and test setup block diagram. (Image source: Texas Instruments)

Texas Instruments, bulk acoustic wave, BAW, crystal devices, IoT
Figuure3 : Comparing the maximum radio (2.44 GHz) frequency deviation (parts per million) induced by mechanical shock on both BAW and crystal devices. (Image source: Texas Intruments)

Conclusion

BAW technology represents real progress within the evolution of IoT by reducing the amount of space required in some critical devices, like those in the medical field, and enabling the use of IoT in places characterized by frequent shocks or vibrations. BAW technology will be one of the catalysts in the connected world of the future across a vast array of sectors.

Habeeb Ur Rahman Mohammed is a validation manager at Texas Instruments within the connected microcontrollers business unit. He has held many different roles at TI, including design, application and validation engineer and graduated with a Master of Science and Ph.D. in electrical engineering from New Mexico State University.

Bill Xiobing Wu is a validation engineer at Texas Instruments. Bill graduated with a Ph.D. from University of Houston. He previously worked as a system application and characterization engineer for TI devices with Bluetooth Low Energy, Wi-Fi, GPS and FM technology.

DesignCon 2020 25th anniversary Logo

January 28-30: North America’s largest chip, board, and systems event, DesignCon, returns to Silicon Valley for its 25th year! The premier educational conference and technology exhibition, this three-day event brings together the brightest minds across the high-speed communications and semiconductor industries, who are looking to engineer the technology of tomorrow. DesignCon is your rocket to the future. Ready to come aboard?

 Register to attend!

qualcomm-has-big-plans-for-5g-in-2020
The Snapdragon 865 (shown) can handle 5G and boasts an AI engine twice as powerful as the previous Snapdragon model and the ability to support 8K video and up to a 200-megapixel camera. (Image source: Qualcomm) 

Qualcomm’s latest Snapdragon platforms are aimed squarely at bringing 5G devices to consumers next year.

This week, at its annual Snapdragon Tech Summit, the chipmaker unveiled two new mobile computing platforms – the Snapdragon 765 and 865 – both targeted at 5G speeds and artificial intelligence processing for Android-based devices.

 “We need systems that put 5G and AI together,” Alex Katouzian, senior vice president and general manager, mobile at Qualcomm, told the Tech Summit audience. He outlined Qualcomm’s roadmap for 2020, where the company plans to be a part of 5G devices released at all tiers, with AI also ubiquitously integrated into them.

The Snapdragon 765 looks to be the more consumer-focused platform. With Qualcomm’s X52 5G modem integrated, the 765 supports both millimeter wave (mmWave) and sub-6 frequencies for 5G and is capable of download speeds of up to 3.7 gigabits per second (Gbit/s), according to Qualcomm. It also supports 5G SA and NSA modes, TDD and FDD with dynamic spectrum sharing (DSS), global 5G roaming, and support for multi-SIM.

Katouzian said the 765 is targeted at serving three major pillars – photo and video, AI, and multiplayer gaming. The platform is equipped with the fifth generation of Qualcomm’s proprietary AI Engine for handling various tasks such as creating better photos. The engine itself is capable of speeds of up to 5 tera (trillion) operations per second (TOPS). The ISP can capture 4K video and can support up to a 192-megapixel camera. Another version of the 765 – the 765G – will be specially optimized for online gaming experiences (the “g” stands for “gaming”). Snapdragon 765G offers a bit more performance. It’s capable of up to 5.5 TOPS and has a boosted GPU for faster graphics rendering.

On the higher end, the Snapdragon 865, which will be packaged with Qualcomm’s X55 modem-RFs (the X55 modem is not integrated in the 865 as the X52 is with the 765), kicks things up in terms of horsepower. Aimed at more premium applications, the 865 is targeting download speeds exceeding 5 Gbit/s, again using mmWave and sub-6. The 865’s AI Engine’s processing speed reaches up to 15 TOPs – double the performance of the previous Snapdragon, the 855.

Qualcomm is touting the 865 as the “worlds first 2-gigabit-per-second camera capable ISP.” The platform can capture 8K video at 30 frames per second. And when filming 4K video each frame can be captured at 64 megapixels. It also supports up to a 200-megapixel camera.

Overall, Katouzian said the 865 offers a 25% increase in graphics performance over the 855 –meaning desktop features, like high-quality gaming, can be brought into the mobile space.

The 865 and 765/G will also be available as modular platforms.

5G hardware is coming

Qualcomm has already actively secured partnerships around the 765 and 865 and has been very active in pushing for 5G-enabled hardware for both mobile and desktop applications. Earlier this year Qualcomm and long-time collaborator Lenovo unveiled Project Limitless – a concept for a 5G-enabled PC. Based on Qualcomm’s 7-nanometer 8cx 5G compute platform, Project Limitless demonstrated the idea of an “always on, always connected” PC that draws on 5G connectivity for cloud-based applications and storage as well as distributed computing.

According to Sergio Buniac, president of Lenovo subsidiary Motorola, the next generation of the newly released Razr will be based on Qualcomm’s latest platforms. Motorola turned heads (and sparked some heavy early 2000’s nostalgia) earlier this year when it announced the 2020 re-release of its once popular flagship phone, the Razr.

The new Razr is a foldable, clamshell phone based on the Snapdragon 710 platform. It’ll be the latest device in a new wave of foldable screen devices coming to market such as Samsung’s new Galaxy Fold, and Microsoft’s Surface Neo foldable, dual-screen laptop.

Chinese electronics company Xiaomi has also made a big commitment to 5G.Speaking at the Snapdragon Tech Summit, Xiaomi’s president, Bin Lin, said the company is committed to launching more than 10 5G smartphones in 2020. Among these will be the Mi 10, a Snapdragon 865-based phone that will feature a 108-megapixel camera.

Lin said Xiaomi also believes 5G will usher in new form factors for phones as well – enabling concept phones like the Xiaomi’s Mi Mix Alpha – a snartphone with a 180-degree wraparound, touchscreen display – to come to reality.

Qualcomm expects the first 765- and 865-based devices to hit markets as soon as the first quarter of 2020.

Chris Wiltz is a Senior Editor at  Design News covering emerging technologies including AI, VR/AR, blockchain, and robotics.

DesignCon 2020 25th anniversary Logo

January 28-30: North America’s largest chip, board, and systems event, DesignCon, returns to Silicon Valley for its 25th year! The premier educational conference and technology exhibition, this three-day event brings together the brightest minds across the high-speed communications and semiconductor industries, who are looking to engineer the technology of tomorrow. DesignCon is your rocket to the future. Ready to come aboard? Register to attend!